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Future of Programmable Hardware (CONIX)

Speaker: James Hoe Field Programmable Gate Arrays (FPGAs) have been undergoing rapid and dramatic changes fueled by their expanding use in datacenter computing. Rather than serving as a compromise or alternative to ASICs, FPGA 'programmable logic' is emerging as a third paradigm of compute that stands apart from traditional hardware vs. software archetypes. In this talk, I will advocate two important future directions to capitalize on. This first is an FPGA-based, new central fixture component in future datacenter servers, serving to connect all server endpoints (network, storage, memory, CPU) intelligently. The second delves in the need for a new, expanded design mindset by FPGA users and designers to fully pursue FPGAs’ programmability and dynamism. Speaker Bio: James C. Hoe is a Professor of Electrical and Computer Engineering at Carnegie Mellon University. He received his Ph.D. in EECS from Massachusetts Institute of Technology in 2000 (S.M., 1994). He received his B.S. in EECS from UC Berkeley in 1992. He is interested in many aspects of computer architecture and digital hardware design, including the specific areas of FPGA architecture for computing; digital signal processing hardware; and high-level hardware design and synthesis. He is a Fellow of IEEE. For more information, please visit http://www.ece.cmu.edu/~jhoe. ---------------------------------------------------------- For more videos subscribe to the YouTube channel    / @crossroadsfpga  ! For more information visit https://www.crossroadsfpga.org/semina... ---------------------------------------------------------- Website: https://www.crossroadsfpga.org The Intel/VMware Crossroads 3D-FPGA Academic Research Center is jointly supported by Intel and VMware. The center is committed to public and free dissemination of its research outcome. ---------------------------------------------------------- Chapters 0:00 Introduction 0:56 Today's FPGAs not RTL targets 2:28 Future of FPGAs in Computing 3:13 Reimagine "FPGA" to the Role 6:52 Past: Ingrained Formula of HW vs SW 7:53 Present: Emergence of FPGAs Ad Hoc 10:35 Future: "FPGA" as a Central Fixture 13:37 True Status of Fixture... 14:45 Field Programmable to Programmable 19:19 Programmability Degrees of Freedom 22:09 E.g. Extreme Tuning to "Common-Case" 27:15 Future FPGA not ASIC-wannabe