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CASS Talks 2021 - May 7, 2021 Automating Analog Layout: Why This Time is Different Sachin S. Sapatnekar University of Minnesota, USA Abstract: EDA tools have been used routinely in the digital design flow for decades, but despite valiant efforts from the research community, analog design has stubbornly resisted automation. Several recent developments are helping turn the tide, driving wider adoption of automation tools within the analog design flow. This talk explains the reasons for this change, and then describes recent efforts in analog layout automation with particular focus on the ALIGN (Analog Layout, Intelligently Generated from Netlists) project. ALIGN is a joint university-industry effort that is developing an open-source analog layout flow, leveraging a blend of traditional algorithmic methods with machine learning based approaches. ALIGN targets a wide variety of designs – low frequency analog circuits, wireline circuits for high-speed links, RF/wireless circuits, and power delivery circuits – under a single framework. The flow is structured modularly and is being built to cater to a wide range of designer expertise: the novice designer could use it in “push-button” mode, automatically generating GDSII layout from a SPICE netlist, while users with greater levels of expertise could bypass parts of the flow to incorporate their preferences and constraints. The talk will present an overview of both the technical challenges and logistical barriers to building an open-source tool flow while respecting the confidentiality requirements of secured IP information. Finally, the application of ALIGN to a variety of designs will be demonstrated. Short CV: Sachin S. Sapatnekar is the Henle Chair in ECE and Distinguished McKnight University Professor at the University of Minnesota, and serves as PI of the ALIGN project. His current research interests include design automation methods for analog and digital circuits, circuit reliability, and algorithms and architectures for machine learning. He is a recipient of the NSF Career Award, the SRC Technical Excellence Award, the Semiconductor Industry Association’s University Researcher Award, and 11 Best Paper awards. He has served as Editor-in-Chief of the IEEE Transactions on CAD and General Chair for the ACM/IEEE Design Automation Conference (DAC). He is a Fellow of the IEEE and the ACM.