Signal Tap Logic Analyzer: Basic Configuration & Trigger Conditions скачать в хорошем качестве

Signal Tap Logic Analyzer: Basic Configuration & Trigger Conditions

This training is part 2 of 4. The Signal Tap embedded logic analyzer (ELA) is a system-level debugging tool that monitors the state of internal FPGA design signals and triggers on custom, user-defined conditions during run-time operation of the device without having to bring signals out to device I/O pins. It integrates directly into your design, making it easy to perform functional debug. This part of the training goes into detail on how to create basic trigger conditions. It then walks through many of the options found in the Signal Configuration section of the tool, including the selection of a sampling clock, choosing buffer options, and the many ways of performing sample storage qualification.