FPGA real-time super-resolution implementation скачать в хорошем качестве

FPGA real-time super-resolution implementation

Demonstration of a hardware FPGA-based system for super-resolution in real-time. This system improves the spatial resolution of low-resolution frames from 180×120-pixels to 640×480 acquired online from the Flir IR camera TAU2 LWIR at 30 frames per second. This digital architecture implements the Lucas-Kanade optical flow algorithm to register the frames shifts and a gradient-based interpolation to reconstruct the high-resolution image. The system was implemented in a Xilinx Spartan-6 LX45 FPGA and work in real-time with video streams consuming 1.45W.