Veltech University_DESIGN OF 3D NoC ROUTER ARCHITECTURE FOR MULTICORE SoC скачать в хорошем качестве

Veltech University_DESIGN OF 3D NoC ROUTER ARCHITECTURE FOR MULTICORE SoC

A project paper presentation on network on chip. OBJECTIVE: NoC (Network On Chip) is an integrated circuit to communicate sub systems between IP cores on system on chip. NoC is a scalable and flexible communication infrastructure for the design of core based SoC. Therefore the reusability of resource is high. The cores are connected with router through RNI(resource network interface).One of the most important design choices for 3D-NoC implementation is the routing algorithm. In this paper, we present an efficient routing algorithm for 3D-NoC named Look-Ahead-3D. This algorithm aims to minimize power consumption and increase the speed of communication while enhancing the system throughput. WAIKHOM RESHMI VTP1186 M-TECH: VLSI Department Of Electronics And Communication Engineering INTERNAL GUIDE: Mr Amit Kumar Sinha, M.E, Asst prof.ECE