CSCI 4996-5996|NMSU|SP'26|W5D1|Intel SGX Explained-8 скачать в хорошем качестве

CSCI 4996-5996|NMSU|SP'26|W5D1|Intel SGX Explained-8

00:00 Introduction & Class Participation Reminder 00:42 Recap: Privilege Level Switching & Page Faults 02:32 What Triggers a Page Fault? 04:06 Virtual to Physical Address Translation 05:02 Page Fault Handling: Stack & Context 06:34 Interrupt Descriptor Table (IDT) & Handler Setup 08:03 IST Index and Alternate Stack Usage 09:46 Saving Execution Context During Fault 11:00 Restoring Context After Exception Handling 12:16 Transition Back to User-Level Execution 13:00 Questions on Page Faults & IST 13:55 Pipeline Multitasking & Instruction Stages 15:50 Pipeline Dependencies & Execution Limits 17:00 Bridging CPU-Memory Speed Gap 17:50 Speculative Execution: Branch Prediction 20:30 Conditional Branching Example 22:00 Memory Latency & Prediction Strategy 24:00 Prediction Paths: True vs False Branch 54:32 Student Presentation Welcome to this deep dive into Intel's Software Guard Extensions (SGX), a powerful hardware-based security feature designed to protect sensitive code and data from disclosure or modification. In this video, we break down the key concepts from a foundational research paper on Intel SGX, making it accessible for students, researchers, and professionals interested in trusted computing.