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An nMOS (n-channel MOSFET) is a voltage-controlled device with four terminals: gate (G), drain (D), source (S), and body/bulk (B). In most circuits the body is tied to the source, so it behaves like a three-terminal part. With a DC bias, it operates in three regions set by the gate-source overdrive (VGS − VT): cutoff , triode/linear, and saturation/active ( acts like a current source). Designers usually bias in saturation for amplification. Channel-length modulation means the effective channel shortens as VDS increases, so the drain current still rises slightly in saturation, giving the device a finite output resistance. If the body isn’t tied to the source, the body effect raises VT as VSB increases. For small-signal analysis around a chosen bias point, replace the device with its hybrid-pi model: the gate is effectively open (very high input resistance), the drain is represented by a current source controlled by vgs with transconductance gm, and an output resistance ro is placed from drain to source to model channel-length modulation. If the body isn’t at the source, include a second, smaller transconductance gmb controlled by vbs. Typical workflow: pick a bias so the device stays in saturation, determine gm and ro from that bias (or from datasheet/model), then use the small-signal model to compute gain, input/output resistances, and bandwidth in the surrounding circuit (e.g., a common-source stage has negative voltage gain roughly set by gm and the load seen at the drain). 00:00 n-MOS basics 4:46 Biasing 6:03 Transconductance 8:29 Channel length modulation 11:15 Small Signal Model