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This talk was held at the Live Embedded Event 2021: https://live-embedded-event.com Since their invention ini the 80s FPGAs are used in many domains of digital electronics. Up until now they play a notable role in embedded system development because they allow simultaneous development of system software and hardware. With the advent of combined System-On-Chips (SoC) and FPGAs in one module, offloading realtime-critical processes to the FPGA got even easier. With mainline Linux support for Xilinx and Intel chips the software side can already be handled with a completely open toolchain. Leaving only the hardware. Thanks to the work of many open-source developers and tools like Yosys and nextpnr we are at a state where it is actually possible to build FPGA bitstreams with a completely open-source toolchain, top to bottom. With the upcoming of RISC-V in the last years there is even an open ISA allowing development of a multitude of compatible, open CPU cores. One project that tries to combine all of this into one framework is LiteX. However, as is often the case in open-source, the projects are scattered all over the place. Getting started therefore means installing a multitude of different tools until a working development environment is set up. Not least this is problematic when working with multiple developers on a single project. Thanks to these open-source tools, we can start developinig hardware like we develop software: using a buildsystem, version-control systems and CI setups for testing. The author tried to find out how far we are yet by the example of using a Lattice ECP5 FPGA and trying to build a 32bit and 64bit RISC-V based SoC with one reproducible buildsystem.