CFU Playground: Model-specific Acceleration on FPGAs - Timothy Callahan & Alan V. Green, Google скачать в хорошем качестве

CFU Playground: Model-specific Acceleration on FPGAs - Timothy Callahan & Alan V. Green, Google

CFU Playground: Model-specific Acceleration on FPGAs - Timothy Callahan & Alan V. Green, Google This talk describes the CFU Playground, an open-source framework that an engineer, intern, or student can use to design and evaluate enhancements to an FPGA-based soft RISC-V processor, specifically to increase the performance of machine learning (ML) tasks through the addition of custom function units (CFUs). The goal is to abstract away most infrastructure details so that the user can get up to speed quickly and focus solely on adding new processor functions, exploiting them in the computation, and measuring the results. The presentation describes the process of identifying hot spots in the code during an inference using a specific model, constructing a CFU to support new custom instructions, modifying the TensorFlow Lite kernel library to use these new instructions, measuring the results, and iterating. The goal is not to design a general ML accelerator; the goal is to jointly specialize the processor and ML kernels just for the model of interest. All IP and software used is open sourced and licensed permissively -- the open RISC-V ISA that allows new custom instructions, the VexRiscv soft core implementation, the LiteX system-on-chip IP, the Symbiflow FPGA toolchain, Renode and Verilator simulators, and TensorFlow Lite kernel libraries. Thus, the combined CPU, CFU, and kernel libraries that the user develops are not tied to any particular FPGA vendor; there are no licensing restrictions or fees; and there is no dependence on any black box proprietary tools. For more info about RISC-V, a free and open ISA enabling a new era of processor innovation through open standard collaboration, see: https://riscv.org/