Tessent Scan DRC S1 rule check - an introduction | Tessent Training скачать в хорошем качестве

Tessent Scan DRC S1 rule check - an introduction | Tessent Training

This video is part of our Scan DRC Series, where we look at common design rule checks and how to fix them. In this session, we’ll focus on the S1 DRC rule check—what it is, why it happens, and the typical situations that cause it. We’ll then walk through a simple, step by step debugging process to find the root cause and show you practical ways to resolve the issue quickly. By the end, you’ll have a clear understanding of the S1 rule and know how to handle it with ease in your own designs. More information on this can be found in Tessent Shell Reference Manual. Please reach out to our Application Engineers for an example testcase. Presenter – Akanksha Pushkar, Technology Enablement Engineer | Tessent, Siemens EDA. DISCOVER TESSENT Tessent helps customers address debug, test, yield, safety, security and optimization requirements for today’s most complex SoCs, by reducing design complexity using high-quality DFT. Tessent solutions include advanced debug, safety & security features and in-life data analytics. Tessent Silicon Lifecycle Solutions is a division of Siemens EDA and is widely recognized as an industry leader in delivering design augmentation and linked applications that detect, mitigate and eliminate risks throughout the IC lifecycle. LEARN MORE: https://eda.sw.siemens.com/en-US/ic/t... FOLLOW TESSENT on LinkedIn: / tessent-solutions Email: tessent@siemens.com