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PDN Basics for Power Designers (Part 2): Keep Impedance Flat

In part 1 of this 3-part series, Steve Sandler explained what a power distribution network or PDN is, and noted that board-level power converters such as POLs and VRMs influence the performance of the PDN through their output impedance. Here in part 2, Steve goes into more detail on the issue power converter output impedance and explains why it's necessary for designers of board-level power converters to keep their output impedance curves flat. Steve presents some examples of power converter output impedance to show how they vary in flatness and then presents an experiment showing how peaks in the power converter's impedance curve can impact one important aspect of system performance--clock jitter. This video was originally published in the September 2014 issue of How2Power Today, which is available at http://www.how2power.com/newsletters/... . To view part 3 of this video series, see    • PDN Basics For Power Designers (Part ...   .