FPGA Design with MATLAB, Part 1: Why Use MATLAB and Simulink скачать в хорошем качестве

FPGA Design with MATLAB, Part 1: Why Use MATLAB and Simulink

HDL Coder™ generates synthesizable VHDL® or Verilog® RTL from MATLAB® functions, Simulink® models, and Stateflow® charts that can be used to target FPGA or ASIC hardware. This tutorial uses a simple signal-processing algorithm to show the typical steps our customers follow to adapt their high-level algorithms with hardware architecture detail so they can be implemented efficiently in hardware and verified at each step. This video covers: Key considerations for hardware design: streaming data and fixed resources Strengths of MATLAB and Simulink and how to leverage each for hardware design Overview of the workflow, including verification of each step HDL Coder Self-Guided Tutorial overview Introduction to the MATLAB golden reference algorithm Adapting the frame-based algorithm to a streaming algorithm Get HDL Coder Self-Guided Tutorial: https://bit.ly/2X7Va5y -------------------------------------------------------------------------------------------------------- Get a free product Trial: https://goo.gl/ZHFb5u Learn more about MATLAB: https://goo.gl/8QV7ZZ Learn more about Simulink: https://goo.gl/nqnbLe See What's new in MATLAB and Simulink: https://goo.gl/pgGtod © 2019 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See www.mathworks.com/trademarks for a list of additional trademarks. Other product or brand names may be trademarks or registered trademarks of their respective holders.