Arteris IP: Implementing Low-Power AI SoCs Using NoC Interconnect Technology скачать в хорошем качестве

Arteris IP: Implementing Low-Power AI SoCs Using NoC Interconnect Technology

Presented by Matthew Mangan, Applications Engineer, Arteris IP. As AI / ML processing systems have become more complex with the growing number and complexity of hardware accelerators, it has become increasingly difficult to optimize for both performance and power consumption. Resolving this conundrum is especially important for edge computing and automotive systems. This presentation describes lessons learned using network-on-chip (NoC) technology to implement AI processing SoCs that meet explosive bandwidth and tight latency requirements while meeting stringent power consumption needs. The Linley Spring Processor Conference featured technical presentations on AI acceleration, targeting edge, automotive, IoT, and data center. Also covered were new CPU architectures, networking, security, SoC design, and other processor-related topics. Proceedings from the event are available for download. https://linleygroup.com/events/procee...