Physical Memory Organization of 8086 & Memory & I/O map скачать в хорошем качестве

Physical Memory Organization of 8086 & Memory & I/O map

this video teach you how to organize the physical memory and also tells you the memory map and i/o map. 8086 is a 16 bit microprocessor means that it can handle 16 bits of data at a time but most of the ICs are byte oriented that means each memory location contains 1 byte of data. So to carry 16 bit of data two consecutive memory locations are needed to store 16 bit of data. One is for LS byte & other is for MS byte. In 8086 microprocessor memory (1Mb) physically divided and organized into 2 banks i.e Odd bank (bank 1)& Even bank (bank 0) and each bank is 512kb each ,addressed in parallel by the processor. The processor provides two signals i.e., A0 & BHE’ to select the even or odd banks or both banks. In even address D7-D0 byte data transferred and D15-D0 odd address is transferred on bus lines. Instructions are fetched from memory in the form of byte or word (two consecutive two bytes) like 1.Both the bytes may be data operands or opcode bits 2. one of the bytes may be opcode while other may be data. All of these (identify the opcodes and data ) are decoded by the internal decoder in the microprocessor and acts as input to the timing and control unit. BIU takes one or two memory cycles for referring word data by choosing a starting byte is locate at an even address or odd address. To read/write a full word from/to memory locating even address is preferable and only one read/write cycle is enough. Incase of accessing complete word by locating odd address two memory cycles are requires ;one is for LS byte and other of MS byte. Bank0 is selected when A0 =0 and for all even addresses. i.e., for lower order byte in a word. Bank1 is selected when BHE=0 and for all odd addresses.i.e., for higher order byte in a word. The instructions are fetched from memory either in the form of word or two bytes. or it may contain data/opcodes (both bytes)or else one with opcode and other with data. After the fetched the instruction from memory those are translated by the decoder and which can be derives the signals act as inputs to timing and control unit for execution of instruction. Both BHE’/A0 tell the interface how the data appears on bus.4 possible combinations have shown When the 8086 is reset, the next instruction is fetched from memory location FFFFOH. So the in general the ROM location in 8086 must be start at FFFFOH In the fig we have seen 1Mb memory, some are reserved and some are for specific CPU operations which are dedicated purpose. FFFFOH ,05H is for initialization procedure of 8086. FFFF06-0BH is for initialization procedure of 8089 I/0 processor. 00000H-00013H is dedicated to store vector address of the dedicated interrupts. The dedicated locations are used for processing of specific system initialization, interrupt and reset functions.