Design Procedure: Synthesis Using T & JK Flip-Flops Excitation Tables скачать в хорошем качестве

Design Procedure: Synthesis Using T & JK Flip-Flops Excitation Tables

The manual synthesis procedure for sequential circuits with JK flip-flops is the same as with D flip-flops, except that the input equations must be evaluated from the presentstate to the next-state transition derived from the excitation table. To illustrate the procedure, we will synthesize the sequential circuit specified by Table 5.13 . In addition to having columns for the present state, input, and next state, as in a conventional state table, the table shows the flip-flop input conditions from which the input equations are derived. The flip-flop inputs are derived from the state table in conjunction with the excitation table for the JK flip-flop. For example, in the first row of Table 5.13 , we have a transition for flip-flop A from 0 in the present state to 0 in the next state. In Table 5.12 , for the JK flip-flop, we find that a transition of states from present state 0 to next state 0 requires that input J be 0 and input K be a don’t-care. So 0 and X are entered in the first row under JA and KA, respectively. Since the first row also shows a transition for flip-flop B from 0 in the present state to 0 in the next state, 0 and X are inserted into the first row under JB and KB, respectively.